Ph.D. Graduates of the NanoCAS Lab
  1. Dr. Hailang Wang
    • Ph.D. 2016, first position: Apple Inc., Cupertino, CA
    • Dissertation title: Enhancing Signal and Power Integrity in Three-Dimensional Integrated Circuits (pdf)
M.S. Graduates (with thesis) of the NanoCAS Lab
  1. Yongwan Park
    • M.S. 2016, first position: PhD student at the University of Maryland, College Park, MD
    • Thesis: Fully Integrated Hybrid Voltage Regulator for Low Voltage Applications (pdf)
  2. Sushil Panda
    • M.S. 2016, first position: Dolphin Technology, Santa Clara, CA
    • Thesis: Investigating the Tolerance of Wirelessly Powered Charge-Recycling Logic to Power-Clock Phase Difference Deviations (pdf)
  3. Tasnuva Noor 
    • M.S. 2016
    • Thesis:  Design of a Novel Glitch-Free Integrated Clock Gating Cell for High Reliability (pdf)
  4. Mallika Rathore 
    • M.S. 2014, first position: Marvell Semiconductor, Boise, ID
    • Thesis: Design and Analysis of Custom Clock Buffers and a D Flip-Flop for Low Swing Clock Distribution Networks (pdf)
  5. Peirong Ji 
    • M.S. 2013, first position: SK Hynix , San Jose, CA
    • Thesis: Quantifying the Effect of Local Power Distribution Network and Vias on Power Integrity
  6. Ziqi Zhang 
    • M.S. 2013, first position: Marvell Semiconductor, San Jose, CA
    • Thesis: Comparative Analysis of Near-Threshold and Charge Recovery Circuits for Energy Efficiency and Performance (pdf)
  7. Ajay Chandrasekhar 
    • M.S. 2013, first position: Imagination Technologies, San Jose, CA
    • Thesis: Critical Length Estimation for TSV-Based 3D Sub/Near-Threshold Circuits (pdf)
  8. Sateja Mungi 
    • M.S. 2013, first position: Intel Corporation, Hudson, MA
    • Thesis: Effective Distance Calculations for On-Chip Decoupling Capacitors in 3D ICs (pdf)
  9. Suhas M. Satheesh 
    • M.S. 2012, first position: NVIDIA, Santa Clara, CA
    • Thesis: Power Distribution in TSV Based 3D Processor-Memory Stacks (pdf)
  10. Mohammad H. Asgari 
    • M.S. 2011, first position: PhD student at Columbia University, NY
    • Thesis: TSV Related Noise Coupling in 3-D Integrated Circuits (pdf)
B.S. Graduates of the NanoCAS Lab
  1. Yongwan Park 
    • B.S. 2015, NSF REU scholarship
    • Currently MSc student at Stony Brook University, Stony Brook, NY
    • Research title: Enhanced Regulator Topology for Near-Threshold Operation
  2. Shiwei Fang
  3. Sung Jun Yoon 
    • B.S. 2014, URECA fellow
    • Currently PhD student at Texas A&M University, College Station, TX
    • Research title: A Low Power D Flip-Flop Architecture for Low Swing Clock Trees in Advanced CMOS and FinFET Technologies