ESalman_wEmre Salman (CV)

Professor and Industry Liaison 

Department of Electrical and Computer Engineering
Stony Brook University (SUNY), Stony Brook, New York 11794, USA

Director
Nanoscale Circuits and Systems (NanoCAS) Lab
Heavy Engineering Building, Room 228

Phone: +1-(631)-632-8419
Fax: +1-(631)-632-8494
E-mail: emre.salman@stonybrook.edu

Research Interests

  • Integrated circuits and VLSI systems with applications to:
    • Energy-efficient and secure computing
    • Internet-of-things with energy harvesting
    • Implantable electronics for healthcare
  • Emerging integrated circuit and system technologies

Book_coverEmre’s research has been supported by National Science Foundation (NSF), Semiconductor Research Corporation (SRC), National Institute of Health (NIH), and Simons Foundation.

Emre is the leading author of a comprehensive tutorial book entitled High Performance Integrated Circuit Design (McGraw-Hill, September 2012, 17 chapters, 716 pages, table of contents), which unifies interconnect-centric design methodologies for nanoscale ICs. This book has been translated into Chinese by Electronic Industry Press in 2015.

Complete List of Publications

Honors and Awards

  • Distinguished Lecturer, IEEE Circuits and Systems Society, 2023-2024
  • Technological Innovation Award, IEEE Region 1, 2018
  • Stony Brook University Inaugural Leadership Academy Fellow, 2018
  • Best Paper Award, Semiconductor Research Corporation (SRC) TECHCON, 2016
  • Stony Brook University Discovery Fund Prize Finalist, 2014
  • Outstanding Young Engineer Award, IEEE Long Island 2014
  • National Science Foundation (NSF) CAREER Award, 2013
  • Multiple Outreach Initiative Awards, IEEE CASS, 2012, 2013, 2015 and 2017
  • Best paper nominations at IEEE ISQED 2006 and 2015

Editorial Activities

Organizational and Technical Committee Memberships

  • Chair, VLSI Systems and Applications Technical Committee of the IEEE Circuits and Systems Society, 2020-2022
  • Chair-Elect, VLSI Systems and Applications Technical Committee of the IEEE Circuits and Systems Society, 2018-2020
  • VLSI track chair, IEEE International Midwest Symposium on Circuits and Systems, 2018
  • Special Sessions chair, ACM/IEEE Great Lakes Symposium on VLSI, 2017
  • Registration chair, ACM/IEEE Great Lakes Symposium on VLSI, 2016
  • Finance chair, ACM/IEEE System Level Interconnect Prediction Workshop, 2016
  • Publicity chair, ACM Design Automation Conference PhD Forum, 2012
  • Technical Committee Member, VLSI Systems and Applications, IEEE Circuits and Systems Society, 2015-present
  • Technical Program Committee Member for IEEE ISQED, ACM GLSVLSI, IEEE EDSSC, ASQED, IEEE ICM, ACM SLIP.

Selected Invited Talks and Tutorials

  • Circuits and Devices for Edge AI, High Energy Physics Integrated Circuits Workshop, Brookhaven National Laboratory, May 2024
  • Thermal-Centric Design Methodologies for Monolithic 3D Integrated Circuits, IEEE Princeton Central Jersey Section and Rutgers University, New Jersey, March 2024
  • Charge-Recycling based Design Paradigm for Efficient and Secure RF-Powered IoT Devices, IEEE Southeastern Michigan Chapter, Michigan, December 2023
  • Energy-Efficiency in the Post-Moore Era: Challenges and Opportunities, Brookhaven National Laboratory, October 2023
  • Energy-Efficient DNN Accelerators in the Post-Moore Era: Challenges and Opportunities, Department of Electrical and Computer Engineering, University of Delaware, October 2023
  • Charge-Recycling based Design Paradigm for Efficient and Secure RF-Powered IoT Devices, IEEE Tainan Section Chapter, Taiwan, April 2023
  • Charge-Recycling based Design Paradigm for Efficient and Secure RF-Powered IoT Devices, Architecture and Circuit Research Center (ACRC), Technion, Israel, February 2023
  • Leveraging Monolithic 3D Technology for Data-Centric Applications, Workshop on EES2 (Energy Efficiency Scaling Goal), AMO, Department of Energy, September 2022
  • Accuracy- and Performance-Aware Voltage Scaling Strategies for DNN Accelerators, Instrumentation Division, Brookhaven National Laboratory, Brookhaven, NY, August 2022
  • Error-Aware Deep Neural Network Accelerators Operating at Low Voltages, Information Institute Tech Talks at Air Force Research Labs, Rome, NY, August 2021
  • Hardware Security in Three-Dimensional Integrated Circuits and Systems, Mini tutorial at IEEE International Symposium on Circuits and Systems, October 2020
  • Recent Advances on Monolithic 3D Integrated Circuits, The National Synchrotron Light Source II, Brookhaven National Laboratory, Brookhaven, NY, October 2019
  • The Potential of AC Computing for IoT and Beyond, Google Inc., Sunnyvale, CA, September 2018
  • Back to the “War of Currents”: Can AC Computing be an Alternative for Wirelessly Powered Devices, Department of Electrical and Computer Engineering, University of Rochester, Rochester, NY, May 2017
  • Low Voltage Clocking as a Practical Low Power Design Strategy for Industrial Circuits, Samsung Austin Research Center (SARC), November 2016 (with Prof. B. Taskin)
  • Design and Automation of a Novel Low Swing Clocking Methodology with Reduced Delay Uncertainty, Semiconductor Research Corporation Design Review, Dallas, TX, November 2015 (with Prof.  B. Taskin)
  • Circuits and Algorithms to Facilitate Low Swing Clocking in Nanoscale Technologies, Advanced Micro Devices (AMD) Inc., Austin, TX, September 2015
  • Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances, Lisbon, Portugal, May 2015.
    • Three-hour long tutorial at IEEE International Symposium on Circuits and Systems (with Prof. B. Taskin)
  • Challenges and Opportunities in 3D Integrated Circuits, IEEE Long Island, Farmingdale, NY, April 2015
  • Ensuring Power and Signal Integrity in Heterogeneous 3D ICs, Workshop on 2.5D/3D Technology and Design Enablement for Heterogeneous Systems, Nanyang Technological University, Singapore, July 2013
  • Robust Power Delivery in TSV Based 3D Processor-Memory Stacks, CASS Forum on Emerging and Selected Topics (CAS-FEST), Heterogeneous Nano-Circuits and Systems, Seoul, South Korea, May 2012
  • Noise Management in Highly Heterogeneous SoC Based Integrated Circuits, IEEE International SoC Design Conference, Seoul, South Korea, November 2010

Education

Experience

  • Professor, Stony Brook University, NY, 2023-present
  • Visiting Faculty Research Fellow, Air Force Research Labs, Rome, NY, May-July 2021
  • Visiting Professor, Sabanci University, Istanbul, Turkey, Jan-June 2020
  • Associate Professor, Stony Brook University, NY, 2016-2023
  • Director, NanoCAS Lab, Stony Brook University, NY, 2011-Present
  • Assistant Professor, Stony Brook University, NY, 2010-2016
  • Post-doctoral Research Associate, University of Rochester, NY, 2009-2010
  • Instructor, Rochester Scholars Program, University of Rochester, NY, 2010
  • R&D Engineer, Freescale Semiconductor, Tempe, AZ, Summer 2006 and 2007
  • R&D Engineer, Synopsys, Mountain View, CA, Summer 2005
  • Analog IC Design Engineer, STMicroelectronics, Istanbul, Turkey, 2003-2004

Teaching

  • ESE 555 Advanced VLSI Systems Design (Fall Semesters)
    • Average number of students: 46
  • ESE 585 Nanoscale Integrated Circuit Design (Spring Semesters)
    • Average number of students: 16
  • ESE 324 Electronics Laboratory C (Spring Semesters)
    • Experimental lab course with emphasis on PLLs, data converters, DC-DC voltage converters
    • Average number of students: 58
  • ITS 101 Introduction to Modern Chip Design (Spring 15)
    • New seminar course open  to university-wide freshmen population
    • Limited to 18 students