Our collaborative paper on hardware-efficient logic camouflaging for 3D IC security will be published at IEEE Transactions on Circuits and Systems II: Express Briefs. This paper discusses a layout-level technique to thwart image analysis based reverse engineering attacks, September 2017
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Paper at IEEE ICRC 2017
Our paper on routing congestion aware cell library development for monolithic 3D ICs was accepted to IEEE International Conference on Rebooting Computing, which will take place in DC in November, August 2017
Second PhD alumnus!
Gan successfully defended his PhD thesis that focuses on power- and noise-efficient design methodologies with applications to biomedical acoustic systems. She is joining Nordco in Connecticut as an ultrasonic engineer where she will develop ultrasound transducers to detect faults, July…
Paper at Microelectronics Journal
Our paper on package-embedded spiral inductors with application to high efficiency switching buck converters will be published at Microelectronics Journal. This paper leverages an array of spiral inductors within a flip-chip package to achieve a conversion efficiency of approximately 90%…
Three papers at IEEE ISCAS 2017
We will present three papers (on monolithic 3D integration, AC computing methodology for IoT, and integrated voltage regulators) at ISCAS 2017. We will also present our recent TVLSI paper that summarizes the primary results of our low voltage clocking research.…
Paper at ACM GLSVLSI 2017
Our collaborative paper on 3D IC security (with emphasis on power based side channel attacks) will be presented at the IEEE/ACM Great Lakes Symposium on VLSI (GLSVLSI) in May 2017, February 2017.
Perspective Paper on AC Computing
Our Perspective Paper entitled “Perspective Paper – Can AC Computing be an Alternative for Wirelessly Powered IoT Devices?” was accepted for publication to IEEE Embedded Systems Letters. This paper proposes methods to leverage AC computing for devices that rely on wireless…
Talk at Samsung R&D
Emre and collaborator Baris Taskin gave an invited talk at the Samsung Austin R&D Center (SARC) on how low voltage/swing clocking can be made a practical low power design strategy for industrial circuits, November 2016.
Paper at IEEE AsianHOST
Our paper on camouflaged logic locking for monolithic 3D IC security, in collaboration with Prof. Yu from University of New Hampshire, was accepted to the IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST), October 2016
Best in Session Award at SRC TECHCON
Weicheng received a “Best in Session Award” at the SRC TECHCON 2016 in Austin! For event details, please visit https://www.src.org/calendar/e005107/